How to Read an Specific Device Connected to a Multiplexer

A device that selects between several analog or digital input signals

This commodity is most electronics switching. For telecommunications, meet multiplexing.

Schematic of a ii-to-1 multiplexer. It tin can be equated to a controlled switch.

Schematic of a 1-to-2 demultiplexer. Like a multiplexer, it tin can be equated to a controlled switch.

In electronics, a multiplexer (or mux; spelled sometimes as multiplexor), also known as a data selector, is a device that selects between several analog or digital input signals and forwards the selected input to a single output line.^[1] The choice is directed by a separate fix of digital inputs known as select lines. A multiplexer of ${\displaystyle ii^{due north}}$ inputs has ${\displaystyle n}$ select lines, which are used to select which input line to send to the output.^[2]

A multiplexer makes it possible for several input signals to share one device or resources, for example, 1 analog-to-digital converter or ane communications transmission medium, instead of having one device per input signal. Multiplexers tin can besides be used to implement Boolean functions of multiple variables.

Conversely, a demultiplexer (or demux) is a device taking a unmarried input and selecting signals of the output of the uniform mux, which is continued to the single input, and a shared selection line. A multiplexer is often used with a complementary demultiplexer on the receiving finish.^[i]

An electronic multiplexer tin can be considered every bit a multiple-input, single-output switch, and a demultiplexer as a single-input, multiple-output switch.^[3] The schematic symbol for a multiplexer is an isosceles trapezoid with the longer parallel side containing the input pins and the short parallel side containing the output pin.^[4] The schematic on the right shows a 2-to-1 multiplexer on the left and an equivalent switch on the right. The ${\displaystyle sel}$ wire connects the desired input to the output.

Applications [edit]

The bones function of a multiplexer: combining multiple inputs into a single data stream. On the receiving side, a demultiplexer splits the unmarried data stream into the original multiple signals.

One use for multiplexers is economizing connections over a single channel, by connecting the multiplexer'southward single output to the demultiplexer'southward unmarried input. The epitome to the right demonstrates this benefit. In this case, the cost of implementing carve up channels for each data source is higher than the cost and inconvenience of providing the multiplexing/demultiplexing functions.

At the receiving end of the data link a complementary demultiplexer is usually required to break the single information stream back down into the original streams. In some cases, the far end organization may have functionality greater than a simple demultiplexer; and while the demultiplexing nevertheless occurs technically, it may never exist implemented discretely. This would exist the case when, for case, a multiplexer serves a number of IP network users; and then feeds directly into a router, which immediately reads the content of the entire link into its routing processor; and then does the demultiplexing in retention from where it will be converted directly into IP sections.

Often, a multiplexer and demultiplexer are combined into a single slice of equipment, which is but referred to as a multiplexer. Both circuit elements are needed at both ends of a transmission link because almost communications systems transmit in both directions.

In analog circuit blueprint, a multiplexer is a special type of analog switch that connects one signal selected from several inputs to a single output.

Digital multiplexers [edit]

In digital excursion design, the selector wires are of digital value. In the case of a 2-to-1 multiplexer, a logic value of 0 would connect ${\displaystyle I_{0}}$ to the output while a logic value of 1 would connect ${\displaystyle I_{1}}$ to the output. In larger multiplexers, the number of selector pins is equal to ${\displaystyle \left\lceil \log _{2}(north)\right\rceil }$ where ${\displaystyle n}$ is the number of inputs.

For example, 9 to sixteen inputs would require no fewer than 4 selector pins and 17 to 32 inputs would crave no fewer than 5 selector pins. The binary value expressed on these selector pins determines the selected input pin.

A 2-to-1 multiplexer has a boolean equation where ${\displaystyle A}$ and ${\displaystyle B}$ are the two inputs, ${\displaystyle S_{0}}$ is the selector input, and ${\displaystyle Z}$ is the output:

${\displaystyle Z=(A\wedge \neg S_{0})\vee (B\wedge S_{0})}$

Which can be expressed as a truth table:

${\displaystyle S_{0}}$	${\displaystyle A}$	${\displaystyle B}$	${\displaystyle Z}$
0	0	0	0
0	0	ane	0
0	1	0	ane
0	ane	1	1
1	0	0	0
1	0	1	1
1	1	0	0
1	one	ane	1

Or, in simpler notation:

${\displaystyle S_{0}}$	${\displaystyle Z}$
0	A
1	B

These tables show that when ${\displaystyle S_{0}=0}$ then ${\displaystyle Z=A}$ but when ${\displaystyle S_{0}=one}$ then ${\displaystyle Z=B}$ . A straightforward realization of this 2-to-1 multiplexer would demand ii AND gates, an OR gate, and a Non gate. While this is mathematically correct, a direct physical implementation would be prone to race conditions that require boosted gates to suppress.^[5]

Larger multiplexers are also common and, as stated higher up, require ${\displaystyle \left\lceil \log _{2}(northward)\right\rceil }$ selector pins for ${\displaystyle n}$ inputs. Other common sizes are 4-to-1, viii-to-ane, and 16-to-1. Since digital logic uses binary values, powers of 2 are used (4, 8, 16) to maximally command a number of inputs for the given number of selector inputs.

• 

  iv-to-1 mux

• 

  8-to-1 mux

• 

  16-to-1 mux

The boolean equation for a 4-to-i multiplexer is:

${\displaystyle Z=(A\wedge \neg {S_{0}}\wedge \neg S_{1})\vee (B\wedge S_{0}\wedge \neg S_{1})\vee (C\wedge \neg S_{0}\wedge S_{ane})\vee (D\wedge S_{0}\wedge S_{1})}$

The following iv-to-1 multiplexer is synthetic from iii-country buffers and AND gates (the AND gates are acting as the decoder):

A 4:one MUX circuit using 3 input AND and other gates

The subscripts on the ${\displaystyle I_{n}}$ inputs indicate the decimal value of the binary control inputs at which that input is let through.

Chaining multiplexers [edit]

Larger Multiplexers can be constructed by using smaller multiplexers by chaining them together. For example, an 8-to-1 multiplexer can be made with two four-to-1 and i 2-to-1 multiplexers. The two 4-to-one multiplexer outputs are fed into the 2-to-one with the selector pins on the 4-to-ane's put in parallel giving a total number of selector inputs to three, which is equivalent to an 8-to-i.

Listing of ICs which provide multiplexing [edit]

For 7400 series function numbers in the post-obit table, "x" is the logic family unit.

IC No.	Function	Output State
74x157	Quad 2:one mux.	Output same as input given
74x158	Quad 2:i mux.	Output is inverted input
74x153	Dual 4:1 mux.	Output aforementioned as input
74x352	Dual 4:1 mux.	Output is inverted input
74x151A	8:1 mux.	Both outputs available (i.e., complementary outputs)
74x151	8:1 mux.	Output is inverted input
74x150	16:1 mux.	Output is inverted input

Digital demultiplexers [edit]

Demultiplexers take i data input and a number of selection inputs, and they have several outputs. They frontward the data input to one of the outputs depending on the values of the pick inputs. Demultiplexers are sometimes user-friendly for designing general-purpose logic because if the demultiplexer'due south input is always true, the demultiplexer acts as a binary decoder. This ways that any function of the choice $.25 can be constructed past logically OR-ing the right prepare of outputs.

If X is the input and South is the selector, and A and B are the outputs:

$${\displaystyle A=(X\wedge \neg S)}$$

$${\displaystyle B=(10\wedge S)}$$

Example: A Single Bit one-to-four Line Demultiplexer

List of ICs which provide demultiplexing [edit]

For 7400 series part numbers in the following tabular array, "x" is the logic family.

IC No. (7400)	IC No. (4000)	Function	Output Country
74x139		Dual 1:4 demux.	Output is inverted input
74x156		Dual 1:4 demux.	Output is open collector
74x138		1:viii demux.	Output is inverted input
74x238		i:viii demux.
74x154		one:16 demux.	Output is inverted input
74x159	CD4514/15	1:xvi demux.	Output is open up collector and same as input

Multiplexers as PLDs [edit]

Multiplexers tin can also be used every bit programmable logic devices, to implement Boolean functions. Any Boolean role of n variables and one event can be implemented with a multiplexer with n selector inputs. The variables are connected to the selector inputs, and the function result, 0 or 1, for each possible combination of selector inputs is connected to the corresponding data input. If one of the variables (for example, D) is besides available inverted, a multiplexer with due north-1 selector inputs is sufficient; the information inputs are connected to 0, 1, D, or ~D, co-ordinate to the desired output for each combination of the selector inputs.^[six]

See also [edit]

• Digital subscriber line access multiplexer (DSLAM)
• Inverse multiplexer
• Multiplexing
  • Lawmaking-division multiplexing
  • Frequency-division multiplexing
  • Time-division multiplexing
  • Wavelength-segmentation multiplexing
  • Statistical multiplexing
  • Charlieplexing
• Priority encoder
• Rule 184, a cellular automaton in which each cell acts as a multiplexer for the values from the ii adjacent cells
• Statistical multiplexer

References [edit]

1. ^ ^{a b} Dean, Tamara (2010). Network+ Guide to Networks. Delmar. pp. 82–85. ISBN978-1423902454.
2. ^ Debashis, De (2010). Basic Electronics. Dorling Kindersley. p. 557. ISBN9788131710685.
3. ^ Lipták, Béla (2002). Instrument engineers' handbook: Process software and digital networks. CRC Press. p. 343. ISBN9781439863442.
4. ^ Harris, David (2007). Digital Design and Computer Architecture. Penrose. p. 79. ISBN9780080547060.
5. ^ Crowe, John and Barrie Hayes-Gill (1998) Introduction to Digital Electronics pp. 111-113
6. ^ Donald Due east. Lancaster (1975). The TTL Cookbook. Howard Due west. Sams & Co. pp. 140–143.

Farther reading [edit]

• Yard. Morris Mano; Charles R. Kime (2008). Logic and Computer Design Fundamentals (iv ed.). Prentice Hall. ISBN978-0-13-198926-9.

External links [edit]

• The dictionary definition of multiplexer at Wiktionary

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Source: https://en.wikipedia.org/wiki/Multiplexer

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